1. Field of the Invention
The present invention relates to a structural analysis method employing the finite element method and, more particularly, to a structural analysis method to analyze a structural characteristic of a printed wiring substrate (strain characteristic, stress characteristic, thermal conduction characteristic, for example) by means of a numerical value simulation that employs a computer and refers to an associated program and structural analysis device.
2. Description of the Related Art
A printed wiring substrate on which an integrated circuit pattern is formed by using the mask technology shown in Japanese Patent Application Laid Open No. H9-218032 is employed as the motherboard of an electronic device. Warpage is produced in the printed wiring substrate in accordance with the temperature conditions of the reflow process for mounting the electronic part (LSI: Large Scale Integration, for example). The warpage that occurs as a result of the conditions of the fabrication process causes non-arrival or a shortage of the bump join portions or the like of an electronic part that is mounted on the surface of the printed wiring substrate, whereby the product yield is reduced.
Therefore, the combination of CAD (Computer Aided Design) and the finite element method to structurally analyze the printed wiring substrate and predict the warpage that is produced in the printed wiring substrate as a result of the conditions of the fabrication process is known (Japanese Patent Application Nos. 2004-13437 and 2000-231579, and U.S. Pat. No. 3,329,667). As a result of this prediction, design modifications can be implemented to produce a printed wiring substrate with minimal warpage in the mounting process.